10.29327/1298262.25-22
This work intends to specify a process to develop aerospace devices that use VHDL (Very High-Speed Integrated Circuit (VHSIC) Hardware Description Language) to describe the digital hardware logic and assure all safety-critical features involved in the process were assessed. This work aims to a process that goes from the requirements to the logic implementation at the component described level. The research methodology contains 4 phases (Phases 1 to 4). We have already completed Phases 1 and 2. Currently, we are working on Phase 3. This work is being developed as part of a master's degree to be concluded by the end of 2023 inside of the Postgraduate Program in Space Sciences and Technologies of the Instituto Tecnológico de Aeronáutica.
Aerospace; FPGA; VHDL; Requirements; life-cycle
@inproceedings{wer202221,
author = {Santos, C. R. D. and Marques, J. C.},
title = {ASP: An Aerospace Specification Process for Hardware Logic},
booktitle = {Proceedings of the WER2022-25th Workshop on Requirements Engineering, Natal-RN, Brazil},
year = {2022},
issn = {2675-0066},
isbn = {978-65-00-73495-9},
doi = {10.29327/1298262.25-22}
}